DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 767

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
SH7201 Group
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
2 to 0
Bit Name
BC[2:0]
Initial
Value
000
R/W
R/W
Description
Bit Counter
These bits specify the number of bits to be transferred
next. When read, the remaining number of transfer bits
is indicated. With the I
transferred with one addition acknowledge bit. Should
be made between transfer frames. If these bits are set
to a value other than B'000, the setting should be made
while the SCL pin is low. The bit value returns to B'000
automatically at the end of a data transfer including the
acknowledge bit. And the value becomes B'111
automatically after the stop condition detection. These
bits are cleared by a power-on reset, in deep standby
mode, software standby mode, or module standby
mode. These bits are also cleared by setting the
IICRST bit of ICCR2 to 1. With the clocked synchronous
serial format, these bits should not be modified.
I
000: 9 bits
001: 2 bits
010: 3 bits
011: 4 bits
100: 5 bits
101: 6 bits
110: 7 bits
111: 8 bits
2
C Bus Format
Clocked Synchronous Serial Format
000: 8 bits
001: 1 bit
010: 2 bits
011: 3 bits
100: 4 bits
101: 5 bits
110: 6 bits
111: 7 bits
2
C bus format, the data is
Section 17 I
2
C Bus Interface 3 (IIC3)
Page 739 of 1190

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