DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 360

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 11 Direct Memory Access Controller (DMAC)
11.3.10 DMA Activation Control Register (DMSCNT)
DMSCNT controls the operation of the DMAC.
Page 332 of 1190
Bit
31 to 17 ⎯
16
15 to 0
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Bit Name
DMST
31
15
R
R
0
0
30
14
R
R
0
0
29
13
R
R
0
0
All 0
Initial
Value
All 0
0
28
12
R
R
0
0
27
11
R
R
0
0
R/W
R
R/W
R
26
10
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
DMAC Module Activation
This bit is used to stop or activate the DMAC module.
When this bit is cleared to "0", the DMAC module
stops.
When this bit is set to "1", the DMAC module is
operational.
For details, see section 11.4.3, DMA Activation, and
section 11.6, Suspending, Restarting, and Stopping of
DMA Transfer.
0: DMAC halted
1: DMAC operating
Reserved
These bits are always read as 0. The write value
should always be 0.
25
R
R
0
9
0
24
R
R
0
8
0
23
R
R
0
7
0
22
R
R
0
6
0
21
R
R
0
5
0
20
R
R
0
4
0
R01UH0026EJ0300 Rev. 3.00
19
R
R
0
3
0
18
R
R
0
2
0
SH7201 Group
17
Sep 24, 2010
R
R
0
1
0
DMST
R/W
16
R
0
0
0

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