r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 991

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Note: When starting transmission before one frame of data write has completed, take care no
23.3.79 FIFO Depth Register (FDR)
FDR is a 32-bit readable/writable register that specifies the sizes of the transmit and receive
FIFOs.
Bit
31 to 11
10 to 8
7 to 5
Initial value:
Initial value:
R/W:
R/W:
underflow occurs.
Bit:
Bit:
Bit Name

TFD[2:0]

31
15


R
R
0
0
30
14


R
R
0
0
29
13


R
R
0
0
Initial
Value
All 0
All 1
All 0
28
12


R
R
0
0
27
11


R
R
0
0
R/W
R
R/W
R
R/W
26
10

R
0
1
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Transmit FIFO Size
Specifies 256 bytes to 2 Kbytes in 256-byte units as the
size of the transmit FIFO whose maximum size is 2
Kbytes. The setting must not be changed after
transmission/reception has started.
H'00 : 256 bytes
H'01 : 512 bytes
H'07 : 2048 bytes
Reserved
These bits are always read as 0. The write value should
always be 0.
TFD[2:0]
R/W
25

R
0
9
1
:
R/W
24

R
0
8
1
:
Section 23 Gigabit Ethernet Controller (GETHER)
23


R
R
0
7
0
Rev. 1.00 Oct. 01, 2007 Page 925 of 1956
22


R
R
0
6
0
21


R
R
0
5
0
R/W
20

R
0
4
1
R/W
19

R
0
3
1
RFD[4:0]
REJ09B0256-0100
R/W
18

R
0
2
1
17

R
0
1
1
R/W
16

R
0
0
1