r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 554
r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
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Section 13 PCI Controller (PCIC)
(2)
Refer to Section 13.4.4 (1), Accessing This LSI Address Space.
Rev. 1.00 Oct. 01, 2007 Page 488 of 1956
REJ09B0256-0100
Initial value:
Initial value:
Bit
1
0
PCI R/W:
PCI R/W:
SH R/W:
SH R/W:
PCI Local Space Register 0 (PCILSR0)
Bit:
Bit:
Bit Name
RSTCTL
CFINIT
31
15
—
—
R
R
R
R
0
0
30
14
—
—
R
R
R
R
0
0
Initial
Value
0
0
29
13
—
—
R
R
R
R
0
0
R/W
28
12
—
R
R
R
0
0
R/W
SH: R/W
PCI: R
SH: R/W
PCI: R
R/W
27
11
—
R
R
R
0
0
R/W
26
10
—
R
R
R
0
0
Description
PCIRESET Output
Controls the PCIRESET output by software. This bit is
valid when the PCIC operates in host bus bridge
mode.
0: Negates PCIRESET output (high level output)
1: Asserts PCIRESET output (low level output)
Note: The PCIRESET is also asserted during power-
PCI Internal Register Initialize Control
Set this bit to 1 after the initialization of the PCIC
internal registers are completed. Setting this bit
enables accesses from the PCI bus. During
initialization in host bus bridge mode, the bus is not
given to the device on the PCI bus. In normal mode,
the PCIC returns RETRY when it is accessed from the
PCI bus.
0: During initialization
1: Initialization completed
R/W
25
—
R
R
R
9
0
0
LSR
R/W
on reset.
24
—
R
R
R
0
8
0
R/W
23
—
R
R
R
0
7
0
R/W
22
—
R
R
R
0
6
0
R/W
21
—
R
R
R
0
5
0
R/W
20
—
R
R
R
0
4
0
19
—
—
R
R
R
R
0
3
0
18
—
—
R
R
R
R
0
2
0
17
—
—
R
R
R
R
0
1
0
R/W
MBA
16
RE
—
R
R
R
0
0
0
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