r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1635
r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
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36.4.5
Note: This flowchart shows just one example of interrupt transfer processing. Other possibilities include an
EP3 Interrupt-In Transfer
operation flow in which, if there is data to be transferred, the EP3 DE bit in the USB data status register
is referenced to confirm that the FIFO is empty, and then data is written to the FIFO.
Data transmission to host
Set EP3 transmission
(IFR0/EP3 TS = 1)
IN token reception
USB function
Figure 36.12 EP3 Interrupt-In Transfer Operation
in EP3 FIFO?
complete flag
Valid data
Yes
ACK
No
NAK
Interrupt request
Clear EP3 transmission
Write data to EP3 data
Write data to EP3 data
Write 1 to EP3 packet
Write 1 to EP3 packet
(TRG/EP3 PKTE = 1)
(TRG/EP3 PKTE = 1)
Section 36 USB Function Controller (USBF)
(IFR1/EP3 TS = 0)
Rev. 1.00 Oct. 01, 2007 Page 1569 of 1956
register (EPDR3)
register (EPDR3)
for transmission
for transmission
complete flag
Is there data
Is there data
enable bit
enable bit
to host?
to host?
Application
Yes
Yes
No
No
REJ09B0256-0100
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