r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 563

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Bit
1
0
Bit Name
MWPDI
MRDPEI
Initial
Value
0
0
R/W
SH: R/WC
PCI: R
SH: R/WC
PCI: R
Description
Master Write PERR Detection Interrupt
Indicates that the PERR signal has been received
during a master write access (only detected when
PCICMD.PER is set to 1) when the PCIC functions as
a master.
0: Master write PERR interrupt does not occur
[Clear condition]
Write 1 to this bit (write clear).
1: Master write PERR interrupt occurs
[Set condition]
When a master write PERR interrupt occurs.
Master Read Data Parity Error Interrupt
Indicates that a data parity error has been detected
during a master read access (only detected when
PCICMD.PER is set to 1) when the PCIC functions as
a master.
0: Master read data perity error interrupt does not
[Clear condition]
Write 1 to this bit (write clear).
1: Master read data perity error interrupt occurs
[Set condition]
When a master read data perity error interrupt occurs.
occur
Rev. 1.00 Oct. 01, 2007 Page 497 of 1956
Section 13 PCI Controller (PCIC)
REJ09B0256-0100