r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 806

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 20 16-Bit Timer Pulse Unit (TPU)
20.4.5
In phase counting mode, the phase difference between two external clock inputs is detected and
TCNT is incremented/decremented accordingly. This mode can be set for channels 2, and 3.
When phase counting mode is set, an external clock is selected as the counter input clock and
TCNT operates as an up/down-counter regardless of the setting of bits TPSC2 to TPSC0 and bits
CKEG1 and CKEG0 in TCR. However, the functions of bits CCLR1 and CCLR0 in TCR, and of
TIOR, TIER, and TGR are valid, and compare match and interrupt functions can be used.
The previous set value (initial output value set before the timer was started in phase counting
mode) is output from the TPU_TO pin in TIOR.
When overflow occurs while TCNT is counting up, the TCFV flag in TSR is set; when underflow
occurs while TCNT is counting down, the TCFU flag is set.
The TCFD bit in TSR is the count direction flag. Reading the TCFD flag provides an indication of
whether TCNT is counting up or down.
Table 20.9 shows the correspondence between external clock pins and channels.
Table 20.9 Phase Counting Mode Clock Input Pins
Rev. 1.00 Oct. 01, 2007 Page 740 of 1956
REJ09B0256-0100
Channels
When channel 2 is set to phase counting mode
When channel 3 is set to phase counting mode
Phase Counting Mode
A-Phase
TPU_TI2A
TPU_TI3A
External Clock Pins
B-Phase
TPU_TI2B
TPU_TI3B