r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 435

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

(2)
Wait cycle insertion for the SRAM interface can be controlled by CSnWCR. If the IW bits for
each area in CSnWCR is not 0, a software wait is inserted in accordance with the wait-control bits.
For details, see section 11.4.4, CSn Wait Control Register (CSnWCR).
A specified number of Tw cycles is inserted as wait cycles in accordance with the CSnWCR
setting. The insertion timing of the wait cycle is shown in figure 11.8.
Wait Cycle Control
Figure 11.8 SRAM Interface Wait Timing (Software Wait Only)
D31 to D0
(read)
D31 to D0
(Write)
DA: Dual address DMA
CLKOUT
A25 to A0
CSn
RDWR
RD
WE
BS
RDY
DACK
(DA)
T
1
T
w
Section 11 Local Bus State Controller (LBSC)
Rev. 1.00 Oct. 01, 2007 Page 369 of 1956
T
2
REJ09B0256-0100