r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 938
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
- Current page: 938 of 2026
- Download datasheet (12Mb)
Section 23 Gigabit Ethernet Controller (GETHER)
23.3.49 CAM Entry Table Enable Register (TSU_TEN)
TSU_TEN enables or disables the settings of TSU_ADRH0 to TSU_ADRH31 and TSU_ADRL0
to TSU_ADRL31.
Rev. 1.00 Oct. 01, 2007 Page 872 of 1956
REJ09B0256-0100
Bit
31
30
29
28
27
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
TEN16 TEN17 TEN18 TEN19 TEN20 TEN21 TEN22 TEN23 TEN24 TEN25 TEN26 TEN27
Bit Name
TEN0
TEN1
TEN2
TEN3
TEN4
TEN0
R/W
R/W
31
15
0
0
TEN1
R/W
R/W
30
14
0
0
TEN2
R/W
R/W
29
13
0
0
Initial
Value
0
0
0
0
0
TEN3
R/W
R/W
28
12
0
0
TEN4
R/W
R/W
27
11
R/W
R/W
R/W
R/W
R/W
R/W
0
0
TEN5
R/W
R/W
26
10
0
0
Description
CAM Entry Table 0 (TSU_ADRH0 and TSU_ADRL0)
Setting
0: Disabled
1: Enabled
CAM Entry Table 1 (TSU_ADRH1 and TSU_ADRL1)
Setting
0: Disabled
1: Enabled
CAM Entry Table 2 (TSU_ADRH2 and TSU_ADRL2)
Setting
0: Disabled
1: Enabled
CAM Entry Table 3 (TSU_ADRH3 and TSU_ADRL3)
Setting
0: Disabled
1: Enabled
CAM Entry Table 4 (TSU_ADRH4 and TSU_ADRL4)
Setting
0: Disabled
1: Enabled
TEN6
R/W
R/W
25
0
9
0
TEN7
R/W
R/W
24
0
8
0
TEN8
R/W
R/W
23
0
7
0
TEN9 TEN10 TEN11 TEN12 TEN13 TEN14 TEN15
R/W
R/W
22
0
6
0
R/W
R/W
21
0
5
0
R/W
R/W
20
0
4
0
TEN28 TEN29 TEN30 TEN31
R/W
R/W
19
0
3
0
R/W
R/W
18
0
2
0
R/W
17
0
1
0
R/W
R/W
16
0
0
0
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