r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1644

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 36 USB Function Controller (USBF)
Rev. 1.00 Oct. 01, 2007 Page 1578 of 1956
REJ09B0256-0100
(1) Transition from normal operation to stall
(2) When Clear Feature is sent after EPSTL is cleared
(3) When Clear Feature is sent before EPSTL is cleared to 0
(1-2)
(1-3)
(1-1)
(2-1)
(2-2)
(2-3)
(3-1)
(1-4)
Transaction request
STALL handshake
Transaction request
STALL handshake
Clear Feature command
Clear Feature command
STALL handshake
Note: The CTLR/ASCE bit should be set to 1 before
Figure 36.17 Forcible Stall by Application
USB
the EPnSTL bit (each stall bit) in EPSTL is set to 1.
Internal status bit
Internal status bit
Internal status bit
Internal status bit
Internal status bit
Internal status bit
Internal status bit
Internal status bit
0 → 1
0 → 1
1 → 0
1 → 0
0
0
1
1
Normal status restored
To (2-1) or (3-1)
To 2 of (2-1)
Reference
To (1-2)
Stall
Stall
EPnSTL
EPnSTL
EPnSTL
EPnSTL
EPnSTL
EPnSTL
EPnSTL
EPnSTL
0 → 1
1 → 0
1
1
1
0
0
1
1. 1 set in CTLR/ASCE
2. 1 set in EPnSTL
3. EPnSTL cleared to 0
4. Internal status bit set to 1
5. Transmission of STALL
1. 1 written to EPnSTL
1. IN/OUT token
2. EPnSTL referenced
1. 0 set in CTLR/ASCE
2. 1 set in EPnSTL
3. Internal status bit set to 1
4. Transmission of STALL
1. EPnSTL cleared to
2. IN/OUT token
3. Internal status bit
4. EPnSTL not
5. Internal status bit
1. Transmission of
1. Internal status bit
1. Internal status bit
2. EPnSTL not
automatically
handshake
by application
received from host
handshake
0 by application
received from host
already set to 1
referenced
not changed
STALL handshake
cleared to 0
cleared to 0
changed