r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 818

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 21 Compare Match Timer (CMT)
21.2.2
CMCSR is a 16-bit register that indicates the occurrence of compare matches, enables interrupts
and DMA transfer request, and sets the counter input clocks.
Do not change bits other than bits CMF and OVF during the compare match timer counter
(CMCNT) operation.
Rev. 1.00 Oct. 01, 2007 Page 752 of 1956
REJ09B0256-0100
Initial value:
Bit
15
14
R/W:
Bit:
Bit Name
CMF
OVF
R/(W)* R/(W)*
Compare Match Timer Control/Status Register (CMCSR)
CMF
15
0
OVF
14
0
Initial
Value
0
0
13

R
0
12

R
0
R/W
R/(W)*
R/(W)*
11

R
0
10

R
0
1
1
Description
Compare Match Flag
This flag indicates whether or not values of the compare
match timer counter (CMCNT) and compare match timer
constant register (CMCOR) have matched.
Software cannot write 1 to the bit. When one-shot is
selected for the counter operation, counting resumes by
clearing this bit.
0: CMCNT and CMCOR values have not matched
[Clearing condition]
•
1: CMCNT and CMCOR values have matched
Overflow Flag
This flag indicates whether or not the compare match
timer counter (CMCNT) has overflowed and been cleared
to 0. Software cannot write 1 to this bit.
0: CMCNT has not overflowed
[Clearing condition]
•
1: CMCNT has overflowed
CMS
R/W
9
0
Write 0 to CMF after reading CMF=1
Write 0 to OVF after reading OVF=1
CMM
R/W
8
0

R
7
0

R
6
0
R/W
5
0
CMR[1:0]
R/W
4
0

R
3
0
R/W
2
0
CKS[2:0]
R/W
1
0
R/W
0
0