r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 335

Manufacturer Part Number

r5s77631ay266bgv

Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series

Manufacturer

Renesas Electronics Corporation.

INT2A01 (mask state is not affected) is a 32-bit read-only register that indicates interrupt source

modules. Even if interrupt masking is set in the interrupt mask register, INT2A01 indicates a

source module in a corresponding bit (the corresponding interrupt is not generated). If source

indication is not necessary depending on the state of the interrupt mask register, use INT2A11.

Initial value:

Interrupt Source Register 01 (Mask State is not affected) (INT2A01)

Note: * This bit is reserved in the R5S77631.

SIM SIOF2 SIOF1 LCDC

Indicates CMT interrupt source

write value should always be 0.

Indicates DMAC interrupt source

Indicates H-UDI interrupt source

This bit is always read as 0. The

write value should always be 0.

Indicates WDT interrupt source

Indicates SCIF1 interrupt source

Indicates SCIF0 interrupt source

Indicates RTC interrupt source

Indicates TMU1 interrupt source

Indicates TMU0 interrupt source

This bit is always read as 0. The

Rev. 1.00 Oct. 01, 2007 Page 269 of 1956

Section 9 Interrupt Controller (INTC)

Indicates interrupt

sources for each

peripheral module

(INT2A0 is not

affected by the state

of the interrupt mask

0: No interrupts

1: Interrupts are

Note: Reading the

notified to the

CPU directly

can identify

sources. In this

case, reading

INT2A0 is not

REJ09B0256-0100