r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1602

Manufacturer Part Number

r5s77631ay266bgv

Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series

Manufacturer

Renesas Electronics Corporation.

Section 36 USB Function Controller (USBF)

36.3.27 Trigger Register (TRG)

TRG generates one-shot triggers FIFO for each endpoint of EP0s, EP0i, EP0o, EP1, EP2, and

EP3. The packet enable trigger for the IN FIFO register and read complete trigger for the OUT

FIFO register are triggers to be given.

Rev. 1.00 Oct. 01, 2007 Page 1536 of 1956

REJ09B0256-0100

Initial value:

Initial Value R/W Description

The write value should always be 0.

EP3 Packet Enable

EP1 Read Complete

EP2 Packet Enable

The write value should always be 0.

EP0s Read Complete

EP0o Read Complete

EP0i Packet Enable

These bits are always read as undefined value.

Write value should always be 0.