r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 971

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Bit
31 to 7
6
5, 4
3, 2
1
0
Bit Name

DE
DL[1:0]

SWRT
SWRR
Initial
Value
All 0
0
00
All 0
0
0
R/W
R
R/W
R/W
R
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Transmit/Receive Frame Endian
Sets the endian mode for DMA transfer of frame data
between the transmit/receive FIFO and transmit/receive
buffer.
0: Big endian (longword access)
1: Little endian (longword access)
Transmit/Receive Descriptor Length
These bits specify the descriptor length. (See section
23.4.1, Descriptors and Descriptor List.)
00: 16 bytes
01: 32 bytes
10: 64 bytes
11: Setting prohibited
Reserved
These bits are always read as 0. The write value should
always be 0.
Software Reset of Transmit FIFO Controller
[Writing]
0: Disabled
1: Software reset started
[Reading]
0: Software reset not executed (or completed)
1: Software reset being executed
Software Reset of Receive FIFO Controller
[Writing]
0: Disabled
1: Software reset started
[Reading]
0: Software reset not executed (or completed)
1: Software reset being executed
Section 23 Gigabit Ethernet Controller (GETHER)
Rev. 1.00 Oct. 01, 2007 Page 905 of 1956
REJ09B0256-0100