r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1262
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
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Section 29 Serial I/O with FIFO (SIOF)
29.3.3
SICTR is a 16-bit readable/writable register that sets the SIOF operating state.
Rev. 1.00 Oct. 01, 2007 Page 1196 of 1956
REJ09B0256-0100
Initial value:
Bit
15
14
13 to 10 —
R/W:
BIt:
Control Register (SICTR)
Bit Name
SCKE
FSE
SCKE FSE
R/W
15
0
R/W
14
0
13
—
R
0
Initial
Value
0
0
All 0
12
—
R
0
R/W
R/W
R/W
R
11
—
R
0
10
—
R
0
Description
Serial Clock Output Enable
This bit is valid in master mode.
0: Disables the SIOF_SCK output (outputs 0)
1: Enables the SIOF_SCK output
If this bit is set to 1, the SIOF initializes the baud rate
generator and initiates the operation. At the same time,
the SIOF outputs the clock generated by the baud rate
generator to the SIOF_SCK pin.
Frame Synchronous Signal Output Enable
This bit is valid in master mode.
0: Disables the SIOF_SYNC output (outputs 0)
1: Enables the SIOF_SYNC output
If this bit is set to 1, the SIOF initializes the frame
counter and initiates the operation.
Reserved
These bits are always read as 0. The write value should
always be 0.
TXE
R/W
0
9
RXE
R/W
8
0
—
R
7
0
—
R
6
0
—
R
5
0
—
R
4
0
—
R
3
0
—
R
2
0
TXRST
R/W
1
0
RXRST
R/W
0
0
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