r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1149

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
27.3.8
SCBRR is an 8-bit register that set the serial transmission/reception bit rate in accordance with the
baud rate generator operating clock selected by bits CKS1 and CKS0 in SCSMR.
SCBRR can always be read from and written to by the CPU.
The SCBRR setting is found from the following equation.
Asynchronous mode:
Clocked synchronous mode:
Where B:
Table 27.4 SCSMR Settings
The bit rate error in asynchronous mode is found from the following equation:
n
0
1
2
3
N:
Pck0: Peripheral module operating frequency (MHz)
n:
N =
N =
Error (%) =
Bit Rate Register (SCBRR)
Bit rate (bits/s)
SCBRR setting for baud rate generator (0 ≤ N ≤ 255)
Baud rate generator input clock (n = 0 to 3)
(See table 27.4 for the relation between n and the clock.)
Clock
Pck0
Pck0/4
Pck0/16
Pck0/64
64 × 2
8 × 2
Pck0
Pck0
2n - 1
2n - 1
(N + 1) × B × 64 × 2
× B
× B
CKS1
0
0
1
1
Pck0 × 10
× 10
× 10
6
6
- 1
- 1
6
2n - 1
Section 27 Serial Communication Interface with FIFO (SCIF)
- 1
SCSMR Setting
× 100
Rev. 1.00 Oct. 01, 2007 Page 1083 of 1956
CKS0
0
1
0
1
REJ09B0256-0100

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