r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 670
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
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Section 14 Direct Memory Access Controller (DMAC)
Table 14.10 DMA Transfer Matrix in External Request Mode (only channels 0 to 3)
[Legend]
Yes:
No:
Notes: 1. When the transfer source or destination is on-chip peripheral module register, the
Rev. 1.00 Oct. 01, 2007 Page 604 of 1956
REJ09B0256-0100
Transfer Source
LBSC space
DDRIF space
PCIC space
On-chip peripheral
module*
L RAM
Transfer is available.
Transfer is not available.
2. Transfer is available when the AM bit in CHCR is cleared to 0.
3. Transfer is available when the AM bit in CHCR is set to 1.
4. Transfer is available when the AM bit in CHCR is set to 1 and the destination address of
5. Transfer is available when the AM bit in CHCR is cleared to 0 and the source address of
6. Transfer is available when the source or destination, or both the source and destination
1
transfer size should be the same value of its access size.
the PCIC is H'FD00 0000 to H'FDFF FFFF (PCI memory space 0).
the PCIC is H'FD00 0000 to H'FDFF FFFF (PCI memory space 0).
address of the PCIC is H'FD00 0000 to H'FDFF FFFF (PCI memory space 0).
When the transfer source address is H'FD00 0000 to H'FDFF FFFF, the AM bit in
CHCR is cleared to 0, when the transfer destination address is H'FD00 0000 to H'FDFF
FFFF the AM bit in CHCR is set to 1.
LBSC space DDRIF space PCIC space
Yes
Yes*
Yes*
Yes
Yes
3
3
Yes*
No
Yes*
Yes*
Yes*
2
5
2
2
Transfer Destination
Yes*
Yes*
Yes*
Yes*
Yes*
2
4
5
2
2
On-chip
peripheral
module*
Yes
Yes*
Yes*
Yes
Yes
3
3
1
L RAM
Yes*
Yes*
Yes
Yes
Yes
3
3
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