r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1364

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 31 Multimedia Card Interface (MMCIF)
31.3.4
A value other than 0 must be written to the TBNCR register if multiple block transfer is selected
by the bits TY5 and TY6 in CMDTYR. Set the transfer block number in TBNCR. Every time a
block transfer ends, the value of TBNCR is decremented by one, and the command sequence
finishes when the TBNCR value reaches 0.
31.3.5
The CMDR registers are six 8-bit registers. A command is written to CMDR as shown in table
31.5, and the command is transmitted when the START bit in CMDSTRT is set to 1.
Table 31.5 CMDR Configuration
Rev. 1.00 Oct. 01, 2007 Page 1298 of 1956
REJ09B0256-0100
Bit
15 to 0
Register
CMDR0
CMDR[1:4]
CMDR5
Initial value:
R/W:
Bit:
TBNCR
Transfer Block Number Counter (TBNCR)
Command Registers 0 to 5 (CMDR0 to CMDR5)
Bit Name
R/W
15
0
Contents
Start bit, Host bit, and
command index
Command argument
CRC and End bits
R/W
14
0
R/W
13
0
Initial
Value
All 0
R/W
12
0
R/W
11
R/W
R/W
0
R/W
10
0
Description
Transfer Block Number Counter
[Clearing condition]
When a specified block number is transferred or 0 is
written to TBNCR.
Operation
Write command index
Set the Start bit to 0 and the Host bit to 1
Write command arguments.
Setting of CRC is unnecessary (automatic calculation).
Setting of the End bit is unnecessary.
R/W
9
0
R/W
8
0
TBNCR
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0