r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1378

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 31 Multimedia Card Interface (MMCIF)
31.3.13 Interrupt Status Registers 0 and 1 (INTSTR0, INTSTR1)
The INTSTR registers control MMCIF interrupts.
• INTSTR0
Rev. 1.00 Oct. 01, 2007 Page 1312 of 1956
REJ09B0256-0100
Bit
0
Bit
7
6
Bit Name
CTERIE
Bit Name
FEI
FFI
Initial value:
Initial
Value
0
Initial
Value
0
0
R/W:
Bit:
R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)*
FEI
7
0
R/W
R/W
R/W
R/(W)* FIFO Empty Flag
R/(W)* FIFO Full Flag
FFI
6
0
Description
Command Timeout Error Flag Enable
0: Disables command timeout error flag setting.
1: Enables command timeout error flag setting.
Description
[Setting 1 condition]
When FIFO becomes empty while FEIE =
1 and write data is being transmitted
(when the FIFO_EMPTY bit in CSTR is
set)
[Clearing 0 condition]
Write 0 after reading FEI = 1.
[Setting 1 condition]
When FIFO becomes full while FFIE = 1
and read data is being received
(when the FIFO_FULL bit in CSTR is set)
[Clearing 0 condition]
Write 0 after reading FFI = 1.
DRPI
5
0
DTI
4
0
CRPI
3
0
CMDI
2
0
DBSYI
1
0
BTI
0
0
Interrupt
output
FSTAT
FSTAT

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