r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 819
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
- Current page: 819 of 2026
- Download datasheet (12Mb)
Bit
13 to 10
9
8
7, 6
5, 4
3
Bit Name
CMS
CMM
—
CMR[1:0] 00
—
Initial
Value
All 0
0
0
All 0
0
R/W
R
R/W
R/W
R
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Compare Match Timer Counter Size
Selects whether the compare match timer counter
(CMCNT) is used as a 16-bit counter or a 32-bit counter.
This setting becomes the valid size for the compare
match timer constant register (CMCOR).
0: Operates as a 32-bit counter
1: Operates as a 16-bit counter
Compare Match Mode
Selects one-shot operation or free-running operation of
the counter.
0: One-shot operation
1: Free-running operation
Reserved
These bits are always read as 0. The write value should
always be 0.
Compare Match Request
Selects enable or disable for a DMA transfer request or
internal interrupt request in a compare match.
00: Disables a DMA transfer request and internal
01: Enables DMA transfer request
10: Enables an internal interrupt request
11: Setting prohibited
Reserved
This bit is always read as 0. The write value should
always be 0.
interrupt request
Rev. 1.00 Oct. 01, 2007 Page 753 of 1956
Section 21 Compare Match Timer (CMT)
REJ09B0256-0100
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