r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 794

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 20 16-Bit Timer Pulse Unit (TPU)
20.3.8
TSTR is a 16-bit readable/writable register that selects TCNT operation/stoppage for channels 0 to
3. TSTR is initialized to H'0000 by a reset, but not initialized in standby mode, sleep mode, or
module standby.
Rev. 1.00 Oct. 01, 2007 Page 728 of 1956
REJ09B0256-0100
Bit
15 to 4 
3
2
1
0
Initial value:
R/W:
Bit:
Bit Name
CST3
CST2
CST1
CST0
Timer Start Register (TSTR)
15
R
0
14
R
0
Initial
Value
All 0
0
0
0
0
13
R
0
12
R
0
R/W
R
R/W
R/W
R/W
R/W
11
R
0
Description
Reserved
These bits are always read as 0 and cannot be modified.
Counter Start
These bits select operation or stoppage for TCNT.
0: TCNTn count operation is stopped)
1: TCNTn performs count operation
n = 3 to 0
10
R
0
R
9
0
R
8
0
R
7
0
R
6
0
R
5
0
R
4
0
CST3
R/W
3
0
CST2
R/W
2
0
CST1
R/W
1
0
CST0
R/W
0
0

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