r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 812

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 20 16-Bit Timer Pulse Unit (TPU)
20.5
Note that the kinds of operation and contention described below can occur during TPU operation.
(1)
The input clock pulse width must be at least 2 states in the case of single-edge detection, and at
least 3 states in the case of both-edge detection. The TPU will not operate properly with a
narrower pulse width.
In phase counting mode, the phase difference and overlap between the two input clocks must be at
least 2 states, and the pulse width must be at least 3 states. Figure 20.19 shows the input clock
conditions in phase counting mode.
Rev. 1.00 Oct. 01, 2007 Page 746 of 1956
REJ09B0256-0100
Figure 20.19 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
Input Clock Restrictions
TPU_TCLKA
(TPU_TCLKC)
TPU_TCLKB
(TPU_TCLKD)
Usage Notes
Notes: Phase difference and overlap
Pulse width
Overlap
Pulse width
Phase
differ-
ence
Overlap
: 2 states or more
: 3 states or more
Phase
differ-
ence
Pulse width
Pulse width
Pulse width