r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 984
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
- Current page: 984 of 2026
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Section 23 Gigabit Ethernet Controller (GETHER)
Rev. 1.00 Oct. 01, 2007 Page 918 of 1956
REJ09B0256-0100
Bit
17
16
15 to 11
10
9
8
7
6
5
4
Bit Name
RDEIP
RFOFIP
DLCIP
CDIP
TROIP
RMAFIP
CEEFIP
CELFIP
RRFIP
Initial
Value
0
0
All 0
0
0
0
0
0
0
0
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Receive FIFO Overflow Interrupt Enable
Delayed Collision Detect Interrupt Enable
Receive Multicast Address Frame Interrupt Enable
Description
Receive Descriptor Empty Interrupt Enable
0: Receive descriptor empty interrupt is disabled
1: Receive descriptor empty interrupt is enabled
0: Overflow interrupt is disabled
1: Overflow interrupt is enabled
Reserved
These bits are always read as 0. The write value should
always be 0.
Detect Loss of Carrier Interrupt Enable
0: Detect loss of carrier interrupt is disabled
1: Detect loss of carrier interrupt is enabled
0: Delayed collision detect interrupt is disabled
1: Delayed collision detect interrupt is enabled
Transmit Retry Over Interrupt Enable
0: Transmit retry over interrupt is disabled
1: Transmit retry over interrupt is enabled
0: Receive multicast address frame interrupt is disabled
1: Receive multicast address frame interrupt is enabled
Carrier Extension Error Interrupt Enable
0: Carrier extension error interrupt is disabled
1: Carrier extension error interrupt is enabled
Carrier Extension Loss Interrupt Enable
0: Carrier extension loss interrupt is disabled
1: Carrier extension loss interrupt is enabled
Receive Residual-Bit Frame Interrupt Enable
0: Receive residual-bit frame interrupt is disabled
1: Receive residual-bit frame interrupt is enabled
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