r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 529

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Bit
6
5
4
3
2
1
0
Bit Name
PER
VGAPS
MWIE
SC
BM
MS
IOS
Initial
Value
0
0
0
0
0
0
0
R/W
SH: R/W
PCI: R/W
SH: R
PCI: R
SH: R
PCI: R
SH: R
PCI: R
SH: R/W
PCI: R/W
SH: R/W
PCI: R/W
SH: R/W
PCI: R/W
Description
Parity Error
Controls the device's response when the PCIC detects
a parity error or receives a parity error. When this bit is
set to 1, the PERR signal is asserted.
0: No response parity error
1: Response parity error
VGA Palette Snoop Control
0: VGA compatible device
1: Palette register write is not supported (not
supported)
PCI Memory Write and Invalidate Control
Controls issuance of a memory write and invalidate
command in a master access.
0: Memory write is used
1: Memory write and invalidate command is executable
PCI Special Cycles
Indicates whether or not to support the special cycle
operations in a target access.
0: Special cycles ignored
1: Special cycles monitored (not supported)
PCI Bus Master Control
Controls a bus master.
0: Bus master function disabled
1: Bus master function enabled
PCI Memory Space Control
Controls accesses to memory space of this LSI. When
this bit is cleared to 0, a memory transfer to the PCIC is
terminated with a master abort.
0: Does not respond to memory space accesses
1: Respond to memory space accesses
PCI I/O Space
Controls accesses to I/O space of this LSI. When this
bit is cleared to 0, a I/O transfer to the PCIC is
terminated with a master abort.
0: Does not respond to I/O space accesses
1: Respond to I/O space accesses
(not supported)
Rev. 1.00 Oct. 01, 2007 Page 463 of 1956
Section 13 PCI Controller (PCIC)
REJ09B0256-0100