r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 392

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 11 Local Bus State Controller (LBSC)
Notes: 1. The memory bus width is specified by external pins.
Rev. 1.00 Oct. 01, 2007 Page 326 of 1956
REJ09B0256-0100
Area
2
3*
4
5
6
7*
3
6
2. The memory bus width is specified by the register.
3. Area 3 is used specifically for the DDR-SDRAM. For details, see section 12, DDR-
4. These areas can be used for the DDR-SDRAM or PCI by setting MMSELR. For details,
5. With the PCMCIA interface, the bus width is either 8 bits or 16 bits.
6. If a reserved area is accessed, operation cannot be guaranteed.
7. If 8 or 16 bytes access transfer by another LSI internal bus master module is being
External
addresses
H'0800 0000 to
H'0BFF FFFF
H'0C00 0000 to
H'0FFF FFFF
H'1000 0000 to
H'13FF FFFF
H'1400 0000 to
H'17FF FFFF
H'1800 0000 to
H'1BFF FFFF
H'1C00 0000 to
H'1FFF FFFF
SDRAM Interface (DDRIF).
see section 12, DDR-SDRAM Interface (DDRIF) or see section 13, PCI Controller
(PCIC).
executed, the LBSC is executing two or four times 32-bit access individually.
Size
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
Connectable Memory
SRAM
Burst ROM
MPX
(DDR-SDRAM*
(DDR-SDRAM)
SRAM
Burst ROM
MPX
Byte control SRAM
(DDR-SDRAM*
(PCI*
SRAM
Burst ROM
MPX
PCMCIA
(DDR-SDRAM*
SRAM
Burst ROM
MPX
PCMCIA

4
)
4
4
4
)
)
)
Specifiable
Bus Width
8, 16, 32*
8, 16, 32*
32*
32
32
8, 16, 32*
8, 16, 32*
32*
16, 32*
32
32
8, 16, 32*
8, 16, 32*
32*
8, 16*
32
8, 16, 32*
8, 16, 32*
32*
8, 16*

2
2
2
2
2
2
*
*
2
5
5
2
2
2
2
2
2
2
2
Access Size*
8/16/32 bits
and 32 bytes
8/16/32 bits
and 32 bytes
8/16/32 bits
and 32 bytes
8/16/32 bits
and 32 bytes
8/16/32 bits
and 32 bytes
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