r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 874

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 23 Gigabit Ethernet Controller (GETHER)
23.3.2
ECMR is a 32-bit readable/writable register that specifies the operating mode of the GETHER.
The settings in this register are normally made in the initialization process following a reset.
The operating mode setting must not be changed while the transmitting and receiving functions
are enabled. To switch the operating mode, return the E-MAC and E-DMAC to their initial states
by means of the SWRT and SWRR bits in EDMR before making settings again.
Rev. 1.00 Oct. 01, 2007 Page 808 of 1956
REJ09B0256-0100
Bit
31 to 27
26
25, 24
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
E-MAC Mode Register (ECMR)
Bit Name

TRCCM

31
15


R
R
0
0
30
14


R
R
0
0
MCT
R/W
29
13

R
0
0
Initial
Value
All 0
0
All 0
28
12


R
R
0
0
27
11
R/W
R
R/W
R


R
R
0
0
TRCCM
R/W
26
10

R
0
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Counter Clear Mode
Sets the method for clearing the counter register. Refer
to the description of each register.
0: Cleared to 0 by writing H'11111111 to the relevant
1: Cleared to 0 when the relevant register is read
Reserved
These bits are always read as 0. The write value should
always be 0.
MPDE
R/W
25

R
0
9
0
register
24


R
R
0
8
0
RCSC
R/W
23

R
0
7
0
R/W
22
RE

R
0
6
0
DPAD RZPF
R/W
R/W
21
TE
0
5
0
R/W
20

R
0
4
0
R/W
R/W
ZPF
ILB
19
0
3
0
R/W
PFR
18

R
0
2
0
R/W
RXF
DM
17
0
1
0
R/W
PRM
R/W
TXF
16
0
0
0