r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 351
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
- Current page: 351 of 2026
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INT2B3: Indicates detailed interrupt sources for the DMAC.
Module
SCIF0
Module
DMAC
Bit
3
2
1
0
Bit
31 to 13 —
12
11 to 6
5
4
3
2
1
0
Source
TXI0
BRI0
RXI0
ERI0
Source
DMAE
—
DMTE5
DMTE4
DMTE3
DMTE2
DMTE1
DMTE0
Function
SCIF channel 0 transmit FIFO data
empty interrupt
SCIF channel 0 break interrupt or
overrun error interrupt
SCIF channel 0 receive FIFO data full
interrupt or receive data ready
interrupt
SCIF channel 0 receive error interrupt
Function
These bits are always read as 0. The
write value should always be 0.
DMA channels 0 to 5 address error
interrupt
These bits are always read as 0. The
write value should always be 0.
Channel 5 DMA transfer end interrupt
Channel 4 DMA transfer end interrupt
Channel 3 DMA transfer end interrupt
Channel 2 DMA transfer end interrupt
Channel 1 DMA transfer end interrupt
Channel 0 DMA transfer end interrupt
Rev. 1.00 Oct. 01, 2007 Page 285 of 1956
Section 9 Interrupt Controller (INTC)
Description
Indicates SCIF interrupt
sources. This register
indicates the SCIF
interrupt sources even if
mask setting is made in
the interrupt mask
register for them.
Description
Indicates DMAC
interrupt sources. This
register indicates DMAC
interrupt sources even if
mask setting is made in
the interrupt mask
register for them.
REJ09B0256-0100
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