r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 691

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
15.3.2
EXCMSETR sets the base address used when the internal memory space of this LSI is accessed
by the external CPU.
Bit
31 to 4 
3 to 0
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Bit Name
EXCMSET 0000
External CPU Memory Space Select Register (EXCMSETR)
31
15
R
R
0
0
30
14
R
R
0
0
Initial
Value
All 0
29
13
R
R
0
0
28
12
R
R
0
0
27
11
R/W
R
R/W
R
R
0
0
26
10
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Internal Memory Space Base Address
These bits set the base address of the memory space
used for access to the internal memory by the external
CPU.
The address of the memory space to be accessed is
comprised as follows:
31st and 30th bits: Fixed at B'01
29 to 26th bits: EXCMSET[3:0]
25 to 0th bits: Access address from the external CPU
The address range of the memory space accessible to
the external CPU is from H'4000 0000 to H'7FFF FFFF.
25
R
R
0
9
0
24
R
R
0
8
0
23
R
R
0
7
0
Section 15 External CPU Interface (EXCPU)
Rev. 1.00 Oct. 01, 2007 Page 625 of 1956
22
R
R
0
6
0
21
R
R
0
5
0
20
R
R
0
4
0
R/W
19
R
0
3
0
EXCMSET[3:0]
REJ09B0256-0100
R/W
18
R
0
2
0
R/W
17
R
0
1
0
R/W
16
R
0
0
0

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