r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1109
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
- Current page: 1109 of 2026
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Table 26.4 Suggested Settings for CDF and SCGD*
Note:
26.3.10 Receive and Transmit Data Registers (ICRXD and ICTXD)
Reading from or writing to these registers access different physical internal registers. When data is
to be transmitted, the contents of the shift register are loaded via TXD. After data has been
received into the shift register from the I
• Receive Data Register (ICRXD)
• Transmit Data Register (ICTXD)
Peripheral Clock
Frequency
66.7 MHz
Error
Bit
7 to 0
Bit
7 to 0
*
These are suggested values for the SCL rate.
Bit Name
RXD[7:0]
Bit Name
TXD[7:0]
Initial value:
Initial value:
R/W:
R/W:
All 0
All 0
Initial Value
Initial Value
BIt:
BIt:
CDF
3
- 3.05 %
W
7
0
R
7
0
W
6
0
R
6
0
2
C bus, it is then loaded into RXD.
R/W
R
W
R/W
100 kHz
W
5
0
R
5
0
SCGD
19
W
4
0
Description
Read—Receive Data
Data received by master or slave.
TXD[7:0]
Description
Write—Transmit Data
Data transmitted by master or slave.
R
4
0
RXD[7:0]
W
3
0
R
3
0
Rev. 1.00 Oct. 01, 2007 Page 1043 of 1956
W
2
0
R
2
0
CDF
3
- 5.26 %
W
1
0
Section 26 I
R
1
0
W
0
0
R
0
0
400 kHz
2
C Bus Interface (IIC)
REJ09B0256-0100
SCGD
3
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