r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 955

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

23.3.54 CAM Entry Table 0H to 31H Registers (TSU_ADRH0 to TSU_ADRH31)
TSU_ADRH0 to TSU_ADRH31 are entry tables referred to by the CAM in reception and relay.
Each of these registers sets the upper 32 bits of the 48-bit MAC address. Maximum 32 entries of
MAC addresses can be registered.
Note:
Bit
31 to 0
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Set the CAM entry tables following the procedure below.
1. Check that the ADSBSY bit in TSU_ADSBSY is cleared to 0.
2. Set the upper 32 bits of the MAC addresses by TSU_ADRH0 to TSU_ADRH31.
3. Set the lower 16 bits of the MAC addresses by TSU_ADRL0 to TSU_ADRL31.
Bit Name
ADRHn[31:0]
(n: 0 to 31)
R/W
R/W
31
15
0
0
R/W
R/W
30
14
0
0
R/W
R/W
29
13
0
0
Initial
Value
All 0
R/W
R/W
28
12
0
0
R/W
R/W
27
11
0
0
R/W Description
R/W MAC Address Bits
R/W
R/W
26
10
0
0
These bits set the upper 32 bits of the MAC address.
When the MAC address is 01-23-45-67-89-AB
(displayed in hexadecimal), set H'01234567 in this
register.
R/W
R/W
25
ADRHn[15:0] (n = 0 to 31)
0
9
0
ADRHn[31:16] (n = 0 to 31)
R/W
R/W
24
0
8
0
Section 23 Gigabit Ethernet Controller (GETHER)
R/W
R/W
23
0
7
0
R/W
R/W
Rev. 1.00 Oct. 01, 2007 Page 889 of 1956
22
0
6
0
R/W
R/W
21
0
5
0
R/W
R/W
20
0
4
0
R/W
R/W
19
0
3
0
REJ09B0256-0100
R/W
R/W
18
0
2
0
R/W
17
0
1
0
R/W
R/W
16
0
0
0