r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1490

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 34 Serial Sound Interface (SSI)
34.3.1
SSICR is a 32-bit readable/writable register that controls the IRQ, selects each polarity status, and
sets operating mode.
Rev. 1.00 Oct. 01, 2007 Page 1424 of 1956
REJ09B0256-0100
Initial value:
Initial value:
Bit
31 to 29
28
27
26
R/W:
R/W:
Bit:
Bit:
Control Register (SSICR)
SCKD
R/W
Bit Name

DMEN
UIEN
OIEN
31
15

R
0
0
SWSD
R/W

30
14
R
0
0
SCKP
R/W

29
13
R
0
0
0
Initial
Value
0
0
0
DMEN
SWSP SPDP
R/W
R/W
28
12
0
0
UIEN
R/W
R/W
27
11
R/W
R
R/W
R/W
R/W
0
0
SDTA
OIEN
R/W
R/W
26
10
0
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
DMA Enable
Enables or disables the DMA request.
0: DMA request disabled.
1: DMA request enabled.
Underflow Interrupt Enable
0: Underflow interrupt disabled
1: Underflow interrupt enabled
Overflow Interrupt Enable
0: Overflow interrupt disabled
1: Overflow interrupt enabled
PDTA
IIEN
R/W
R/W
25
0
0
9
DIEN
R/W
DEL
R/W
24
0
8
0
R/W
CHNL[1:0]

23
R
0
7
0
R/W
R/W
22
0
6
0
CKDV
R/W
R/W
21
0
0
5
DWL[2:0]
R/W
R/W
20
4
0
0
MUEN
R/W
R/W
19
3
0
0
R/W
18

2
0
0
R
SWL[2:0]
TRMD
R/W
R/W
17
1
0
0
R/W
R/W
EN
16
0
0
0