r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1838

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 41 User Break Controller (UBC)
41.2.3
CAR0 and CAR1 are readable/writable 32-bit registers specifying the virtual address to be
included in the break conditions for channels 0 and 1, respectively.
• CAR0
Rev. 1.00 Oct. 01, 2007 Page 1772 of 1956
REJ09B0256-0100
Bit
0
Bit
31 to 0
Initial value :
Initial value :
R/W:
R/W:
Bit :
Bit :
Match Address Setting Registers 0 and 1 (CAR0 and CAR1)
Bit Name
CA
Bit Name
BIE
R/W
R/W
31
15
R/W
R/W
30
14
R/W
R/W
Initial
Value
Undefined
29
13
Initial
Value
0
R/W
R/W
28
12
R/W
R/W
27
11
R/W
R/W
R/W
R/W
R/W
R/W
26
10
Description
Break Enable
Specifies whether or not to request a break when the
match condition is satisfied for the channel.
0: Does not request a break.
1: Requests a break.
Description
Compare Address
Specifies the address to be included in the break
conditions.
When the operand bus has been specified using the
CBR0 register, specify the SAB address in CA[31:0].
R/W
R/W
25
9
R/W
R/W
24
8
CA
CA
R/W
R/W
23
7
R/W
R/W
22
6
R/W
R/W
21
5
R/W
R/W
20
4
R/W
R/W
19
3
R/W
R/W
18
2
R/W
R/W
17
1
R/W
R/W
16
0