r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 568

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 13 PCI Controller (PCIC)
(10) PCI Arbiter Interrupt Register (PCIAINT)
In host bus bridge mode, this register records source of an interrupt. When multiple interrupts
occur, only the first source is registered. When an interrupt is disabled, source is registered in
corresponding bit (set to 1) in this register, however, no interrupt occurs.
Rev. 1.00 Oct. 01, 2007 Page 502 of 1956
REJ09B0256-0100
Initial value:
Initial value:
Bit
31 to 14 
13
PCI R/W:
PCI R/W:
SH R/W:
SH R/W:
Bit:
Bit:
Bit Name
MBI
31
15
—
—
R
R
R
R
0
0
30
14
—
—
R
R
R
R
0
0
R/WC
MBI
Initial
Value
All 0
0
29
13
—
R
R
R
0
0
R/WC
TOI
28
12
TB
—
R
R
R
0
0
R/W
SH: R
PCI: R
SH: R/WC
PCI: R
R/WC
TOI
MB
27
—
11
R
R
R
0
0
26
10
—
—
R
R
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Master-Broken Interrupt
An interrupt is detected when the PCIFRAME signal is
not asserted within 16 clock cycles, although the
PCIC gave a master the bus.
0: Master-broken interrupt does not occur
[Clear condition]
Write 1 to this bit (write clear).
1: Master-broken interrupt occurs
[Set condition]
When a master-broken interrupt occurs.
25
—
—
R
R
R
R
9
0
0
24
—
—
R
R
R
R
0
8
0
23
—
—
R
R
R
R
0
7
0
22
—
—
R
R
R
R
0
6
0
21
—
—
R
R
R
R
0
5
0
20
—
—
R
R
R
R
0
4
0
R/WC
TAI
19
—
R
R
R
0
3
0
R/WC
MAI
18
—
R
R
R
0
2
0
R/WC
PEI
RD
17
—
R
R
R
0
1
0
R/WC
WD
PEI
16
—
R
R
R
0
0
0