r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1058
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
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Section 23 Gigabit Ethernet Controller (GETHER)
(2)
Waveforms received from the RMII interface are converted to MII waveforms and output (10
Mbps or 100 Mbps). Illegal carrier detection signal received from the RMII interface is converted
to MII signal and output. RMII_RX-ER signal received from the RMII interface is converted to
MII interface signal and output.
Note: Illegal carrier detection is not generated from preamble detection to reception completion
(3)
Transmit waveforms from the MII interface is converted to the RMII interface waveforms and
output (10 Mbps or 100 Mbps). The collision signal, ET_COL, is generated by AND operation of
the ET_CRS and ET_TX-EN signals.
(4)
In full-duplex transfer mode, the assertion of the COL is suppressed. Figure 23.37 shows a
schematic of the conversion cicuit.
Rev. 1.00 Oct. 01, 2007 Page 992 of 1956
REJ09B0256-0100
Reception
Transmission
Full-Duplex/Half-Duplex Selection
(ET_RX_DV negation).
ET_TX-EN
ET_ETXD0
ET_COL
ET_CRS
ET_RX-DV
ET_ERXD3 to
ET_ERXD0
ET_TX-ER
ET_TX-CLK
ET_RX-CLK
ET_ETXD3 to
Figure 23.37 MII-RMll Conversion Circuit
MII-RMII conversion
Half-duplex/full-duplex
2 bit-to-4 bit
conversion
False carrier
detection
4 bit-to-2 bit
conversion
CRS and
RX_DV
generation
Clock
generation
D
D
REF50CK
RMII_TX-EN
RMII_TXD1
RMII_TXD0
RMII_CRS-DV
RMII_RXD1
RMII_RXD0
RMII_RX-ER
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