r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1473

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Note:
33.3.10 HAC Control Register (HACACR)
HACACR is a 32-bit read/write register used for controlling the HAC interface.
Initial value:
Initial value:
Bit
13
12
11 to 0
Bit
31
30
R/W:
R/W:
Bit:
Bit:
*
Bit Name
PLRFOV
PRRFOV
Bit Name
DMARX16
This register is read/write. Writing 0 to the bit initializes it but writing 1 has no effect.
31
15
R
R
1
0
RX16
DMA
R/W
30
14
R
0
0
TX16
DMA
R/W
Initial
Value
0
0
All 0
29
13
Initial
Value
1
0
R
0
0
28
12
R
R
0
0
R/W
R/W
R/W
R
R/W
R
R/W
27
11
R
R
0
0
ATOMIC
TX12_
R/W
26
10
R
1
0
Description
PCML RX Overrun
0: No PCML RX data overrun has occurred.
1: PCML RX data overrun has occurred because the
PCMR RX Overrun
0: No PCMR RX data overrun has occurred.
1: PCMR RX data overrun has occurred because the
Reserved
Always 0 for read and write.
Description
Reserved
Always 1 for read and write..
16-bit RX DMA Enable
0: Disables 16-bit packed RX DMA mode. Enables the
1: Enables 16-bit packed RX DMA mode. Disables the
HAC has received new data from slot 3 before PCML
data is not read out.
HAC has received new data from slot 4 before
PCMR data is not read out.
RXDMAL_EN and RXDMAR_EN settings.
RXDMAL_EN and RXDMAR_EN settings.
25
R
R
0
9
0
MAL_
R/W
RXD
24
EN
R
0
8
0
R/W
MAL_
TXD
23
EN
R
0
7
0
Rev. 1.00 Oct. 01, 2007 Page 1407 of 1956
MAR_
R/W
RXD
Section 33 Audio Codec Interface (HAC)
22
EN
R
0
6
0
MAR_
R/W
TXD
21
EN
R
0
5
0
20
R
R
0
4
0
19
R
R
0
3
0
REJ09B0256-0100
18
R
R
0
2
0
17
R
R
0
1
0
16
R
R
0
0
0

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