r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 278

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 7 Caches
7.7
This LSI supports two 32-byte store queues (SQs) to perform high-speed writes to external
memory.
7.7.1
There are two 32-byte store queues, SQ0 and SQ1, as shown in figure 7.9. These two store queues
can be set independently.
7.7.2
A write to the SQs can be performed using a store instruction for addresses H'E000 0000 to
H'E3FF FFFC in the P4 area. A longword or quadword access size can be used. The meanings of
the address bits are as follows:
[31:26]
[25:6]
[5]
[4:2]
[1:0]
Rev. 1.00 Oct. 01, 2007 Page 212 of 1956
REJ09B0256-0100
Store Queues
SQ Configuration
Writing to SQ
: 111000
: Don't care
: 0/1
: LW specification
: 00
SQ0
SQ1
Fixed at 0
SQ0[0]
SQ1[0]
4B
Figure 7.9 Store Queue Configuration
SQ0[1]
SQ1[1]
4B
Store queue specification
Used for external memory transfer/access right
0 : SQ0 specification
1: SQ1 specification
Specifies longword position in SQ0/SQ1
SQ0[2]
SQ1[2]
4B
SQ0[3]
SQ1[3]
4B
SQ0[4]
SQ1[4]
4B
SQ0[5]
SQ1[5]
4B
SQ0[6]
SQ1[6]
4B
SQ0[7]
SQ1[7]
4B