r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1304

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 29 Serial I/O with FIFO (SIOF)
(4)
L/R method, rising edge sampling, slot No.0 used for left channel data, slot No.1 used for right
channel data, and frame length = 32 bits
(5)
L/R method, rising edge sampling, slot No.0 used for left-channel transmit data, slot No.1 used for
left-channel receive data, slot No.2 used for right-channel transmit data, slot No.3 used for right-
channel receive data, and frame length = 64 bits
Rev. 1.00 Oct. 01, 2007 Page 1238 of 1956
REJ09B0256-0100
SIOF_RXD
SIOF_SCK
SIOF_SYNC
SIOF_TXD
SIOF_SYNC
SIOF_TXD
SIOF_SCK
SIOF_RXD
16-bit Stereo Data (Case 1)
16-bit Stereo Data (Case 2)
Figure 29.16 Transmit and Receive Timing (16-Bit Stereo Data (1))
Figure 29.17 Transmit and Receive Timing (16-Bit Stereo Data (2))
Specifications:
Specifications:
L-channel data
No bit delay
No bit delay
Slot No.0
TRMD[1:0] = 01,
TDLE = 1,
RDLE = 1,
CD0E = 0,
TRMD[1:0] = 11,
TDLE = 1,
RDLE = 1,
CD0E = 0,
L-channel data
Slot No.0
L-channel data
Slot No.1
REDG = 1,
TDLA[3:0] = 0000,
RDLA[3:0] = 0001,
CD0A[3:0] = 0000,
REDG = 1,
TDLA[3:0] = 0000,
RDLA[3:0] = 0000,
CD0A[3:0] = 0000,
1 frame
1 frame
R-channel data
FL[3:0] = 1101 (frame length: 64 bits),
TDRE = 1,
RDRE = 1,
CD1E = 0,
Slot No.2
FL[3:0] = 1100 (frame length: 32 bits)
TDRE = 1,
RDRE = 1,
CD1E = 0,
R-channel data
TDRA[3:0] = 0010,
RDRA[3:0] = 0011,
CD1A[3:0] = 0000
Slot No.1
TDRA[3:0] = 0001,
RDRA[3:0] = 0001,
CD1A[3:0] = 0000
R-channel data
Slot No.3