LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 836
![IC ARM CORTEX MCU 512K 100-LQFP](/photos/6/65/66516/568-100-lqfp_sot407-1_sml.jpg)
LPC1767FBD100,551
Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.LPC1767FBD100551.pdf
(2 pages)
2.LPC1767FBD100551.pdf
(840 pages)
3.LPC1767FBD100551.pdf
(65 pages)
Specifications of LPC1767FBD100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4967
935289808551
935289808551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
- Current page: 836 of 840
- Download datasheet (6Mb)
NXP Semiconductors
33.7
Chapter 34: Appendix: Cortex-M3 user guide
34.1
34.1.1
34.1.1.1
34.1.1.2
34.1.1.3
34.1.1.4
34.2
34.2.1
34.2.2
34.2.3
34.2.3.1
34.2.3.2
34.2.3.3
34.2.3.3.1 Constant . . . . . . . . . . . . . . . . . . . . . . . . . . . . 651
34.2.3.3.2 Register with optional shift . . . . . . . . . . . . . . 652
34.2.3.4
34.2.3.4.1 ASR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 653
34.2.3.4.2 LSR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 653
34.2.3.4.3 LSL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 654
34.2.3.4.4 ROR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 654
34.2.3.4.5 RRX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 655
34.2.3.5
34.2.3.6
34.2.3.7
34.2.3.7.1 The condition flags . . . . . . . . . . . . . . . . . . . . 657
34.2.3.7.2 Condition code suffixes . . . . . . . . . . . . . . . . 657
34.2.3.8
34.2.3.8.1 Example: Instruction width selection . . . . . . 659
34.2.4
34.2.4.1
34.2.4.1.1 Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 661
34.2.4.1.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 661
34.2.4.1.3 Restrictions. . . . . . . . . . . . . . . . . . . . . . . . . . 661
34.2.4.1.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 661
34.2.4.1.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 661
34.2.4.2
34.2.4.2.1 Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 662
34.2.4.2.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 662
34.2.4.2.3 Restrictions. . . . . . . . . . . . . . . . . . . . . . . . . . 663
34.2.4.2.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 663
UM10360
User manual
JTAG TAP Identification . . . . . . . . . . . . . . . . 643
ARM Cortex-M3 User Guide: Introduction. . 644
ARM Cortex-M3 User Guide: Instruction Set 647
About the processor and core peripherals . . 644
System level interface . . . . . . . . . . . . . . . . . 645
Integrated configurable debug . . . . . . . . . . . 645
Cortex-M3 processor features and benefits
summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 646
Cortex-M3 core peripherals . . . . . . . . . . . . . 646
Instruction set summary . . . . . . . . . . . . . . . . 647
Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .647
Intrinsic functions . . . . . . . . . . . . . . . . . . . . . 650
About the instruction descriptions. . . . . . . . . 650
Operands . . . . . . . . . . . . . . . . . . . . . . . . . . . 651
Restrictions when using PC or SP . . . . . . . . 651
Flexible second operand . . . . . . . . . . . . . . . 651
Shift Operations . . . . . . . . . . . . . . . . . . . . . . 652
Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .653
Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .653
Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .654
Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .654
Address alignment . . . . . . . . . . . . . . . . . . . . 655
PC-relative expressions . . . . . . . . . . . . . . . . 656
Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .656
Conditional execution . . . . . . . . . . . . . . . . . . 656
Instruction width selection. . . . . . . . . . . . . . . 658
Memory access instructions . . . . . . . . . . . . . 660
ADR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 661
LDR and STR, immediate offset . . . . . . . . . . 662
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
34.2.4.2.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . 664
34.2.4.3
34.2.4.3.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 665
34.2.4.3.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 665
34.2.4.3.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 665
34.2.4.3.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 666
34.2.4.3.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 666
34.2.4.4
34.2.4.4.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 667
34.2.4.4.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 667
34.2.4.4.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 667
34.2.4.4.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 667
34.2.4.4.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 668
34.2.4.5
34.2.4.5.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 669
34.2.4.5.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 669
34.2.4.5.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 669
34.2.4.5.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 670
34.2.4.5.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 670
34.2.4.6
34.2.4.6.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 671
34.2.4.6.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 671
34.2.4.6.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 672
34.2.4.6.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 672
34.2.4.6.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 672
34.2.4.6.6 Incorrect examples . . . . . . . . . . . . . . . . . . . 672
34.2.4.7
34.2.4.7.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 673
34.2.4.7.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 673
34.2.4.7.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 673
34.2.4.7.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 673
34.2.4.7.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 673
34.2.4.8
34.2.4.8.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 674
34.2.4.8.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 674
34.2.4.8.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 674
34.2.4.8.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 675
34.2.4.8.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 675
34.2.4.9
34.2.4.9.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 676
34.2.4.9.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 676
34.2.4.9.3 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 676
34.2.4.9.4 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 676
34.2.5
34.2.5.1
34.2.5.1.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 678
34.2.5.1.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 678
LDR and STR, register offset . . . . . . . . . . . . 665
LDR and STR, unprivileged . . . . . . . . . . . . . 667
LDR, PC-relative . . . . . . . . . . . . . . . . . . . . . 669
LDM and STM . . . . . . . . . . . . . . . . . . . . . . . 671
PUSH and POP . . . . . . . . . . . . . . . . . . . . . . 673
LDREX and STREX . . . . . . . . . . . . . . . . . . . 674
CLREX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 676
General data processing instructions. . . . . . 677
ADD, ADC, SUB, SBC, and RSB. . . . . . . . . 678
Chapter 35: Supplementary information
UM10360
© NXP B.V. 2010. All rights reserved.
continued >>
836 of 840
Related parts for LPC1767FBD100,551
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LPC1767](/images/no-image3.png)
Part Number:
Description:
32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
Manufacturer:
NXP [NXP Semiconductors]
Datasheet:
![LPC2420_60](/images/manufacturer_photos/0/4/487/nxp_semiconductors_tmb.jpg)
Part Number:
Description:
NXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
![LPC2458](/photos/41/52/415299/sot570-3_3d_tmb.gif)
Part Number:
Description:
NXP Semiconductors designed the LPC2458 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
![LPC2468](/images/manufacturer_photos/0/4/487/nxp_semiconductors_tmb.jpg)
Part Number:
Description:
NXP Semiconductors designed the LPC2468 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
![LPC2470](/images/manufacturer_photos/0/4/487/nxp_semiconductors_tmb.jpg)
Part Number:
Description:
NXP Semiconductors designed the LPC2470 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer:
NXP Semiconductors
Datasheet:
![LPC2478](/images/manufacturer_photos/0/4/487/nxp_semiconductors_tmb.jpg)
Part Number:
Description:
NXP Semiconductors designed the LPC2478 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer:
NXP Semiconductors
Datasheet:
![XA-G30](/images/manufacturer_photos/0/4/487/nxp_semiconductors_tmb.jpg)
Part Number:
Description:
The Philips Semiconductors XA (eXtended Architecture) family of 16-bit single-chip microcontrollers is powerful enough to easily handle the requirements of high performance embedded applications, yet inexpensive enough to compete in the market for hi
Manufacturer:
NXP Semiconductors
Datasheet:
![XA-G37](/photos/41/52/415289/sot187-2_3d_tmb.gif)
Part Number:
Description:
The Philips Semiconductors XA (eXtended Architecture) family of 16-bit single-chip microcontrollers is powerful enough to easily handle the requirements of high performance embedded applications, yet inexpensive enough to compete in the market for hi
Manufacturer:
NXP Semiconductors
Datasheet:
![XA-S3](/images/manufacturer_photos/0/4/487/nxp_semiconductors_tmb.jpg)
Part Number:
Description:
The XA-S3 device is a member of Philips Semiconductors? XA(eXtended Architecture) family of high performance 16-bitsingle-chip microcontrollers
Manufacturer:
NXP Semiconductors
Datasheet:
![LH75401_LH75411_N](/photos/41/52/415297/sot486-1_3d_tmb.gif)
Part Number:
Description:
The NXP BlueStreak LH75401/LH75411 family consists of two low-cost 16/32-bit System-on-Chip (SoC) devices
Manufacturer:
NXP Semiconductors
Datasheet:
![LPC3130_3131](/photos/41/52/415299/sot570-3_3d_tmb.gif)
Part Number:
Description:
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer:
NXP Semiconductors
Datasheet:
![LPC3141FET180](/photos/41/52/415299/sot570-3_3d_tmb.gif)
Part Number:
Description:
The NXP LPC3141 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
![LPC3143FET180](/photos/41/52/415299/sot570-3_3d_tmb.gif)
Part Number:
Description:
The NXP LPC3143 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
![LPC3152FET208](/photos/41/53/415307/sot930-1_3d_tmb.gif)
Part Number:
Description:
The NXP LPC3152 combines an 180 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
![LPC3154FET208](/photos/41/53/415307/sot930-1_3d_tmb.gif)
Part Number:
Description:
The NXP LPC3154 combines an 180 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors