LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 459

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 400. Slave Receiver mode
UM10360
User manual
I2CSTAT
Status
Code
0x60
0x68
0x70
0x78
0x80
0x88
0x90
Status of the I
and hardware
Own SLA+W has been
received; ACK has been
returned.
Arbitration lost in
SLA+R/W as master;
Own SLA+W has been
received, ACK returned.
General Call address
(0x00) has been
received; ACK has been
returned.
Arbitration lost in
SLA+R/W as master;
General Call address
has been received, ACK
has been returned.
Previously addressed
with own SLA address;
DATA has been received;
ACK has been returned.
Previously addressed
with own SLA; DATA
byte has been received;
NOT ACK has been
returned.
Previously addressed
with General Call; DATA
byte has been received;
ACK has been returned.
2
C-bus
Application software response
To/From I2DAT To I2CON
No I2DAT action
or
No I2DAT action X
No I2DAT action
or
No I2DAT action X
No I2DAT action
or
No I2DAT action X
No I2DAT action
or
No I2DAT action X
Read data byte
or
Read data byte
Read data byte
or
Read data byte
or
Read data byte
or
Read data byte
Read data byte
or
Read data byte
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
STA STO SI
X
X
X
X
X
X
0
0
1
1
X
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next action taken by I
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will be
returned.
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will be
returned.
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will be
returned.
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will be
returned.
Data byte will be received and NOT ACK
will be returned.
returned.
Switched to not addressed SLV mode; no
Switched to not addressed SLV mode;
Switched to not addressed SLV mode; no
Switched to not addressed SLV mode;
Data byte will be received and ACK will be
recognition of own SLA or General Call
address.
Own SLA will be recognized; General Call
address will be recognized if
I2ADR[0] = logic 1.
recognition of own SLA or General Call
address. A START condition will be
transmitted when the bus becomes free.
Own SLA will be recognized; General Call
address will be recognized if
I2ADR[0] = logic 1. A START condition will
be transmitted when the bus becomes
free.
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will be
returned.
Chapter 19: LPC17xx I2C0/1/2
UM10360
2
© NXP B.V. 2010. All rights reserved.
C hardware
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