LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 729

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 626.
[1]
[2]
UM10360
User manual
Name
EPSR
PRIMASK
FAULTMASK
BASEPRI
CONTROL
Describes access type during program execution in thread mode and Handler mode. Debug access can differ.
An entry of Either means privileged and unprivileged software can access the register.
34.3.1.3.1 General-purpose registers
34.3.1.3.2 Stack Pointer
34.3.1.3.3 Link Register
34.3.1.3.4 Program Counter
34.3.1.3.5 Program Status Register
Core register set summary
Type
RO
RW
RW
RW
RW
R0-R12 are 32-bit general-purpose registers for data operations.
The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the CONTROL register
indicates the stack pointer to use:
On reset, the processor loads the MSP with the value from address 0x00000000.
The Link Register (LR) is register R14. It stores the return information for subroutines,
function calls, and exceptions. On reset, the processor loads the LR value 0xFFFFFFFF.
The Program Counter (PC) is register R15. It contains the current program address.
Bit[0] is always 0 because instruction fetches must be halfword aligned. On reset, the
processor loads the PC with the value of the reset vector, which is at address 0x00000004.
The Program Status Register (PSR) combines:
These registers are mutually exclusive bitfields in the 32-bit PSR. The bit assignments
are:
[1]
•
•
•
•
•
0 = Main Stack Pointer (MSP). This is the reset value.
1 = Process Stack Pointer (PSP).
Application Program Status Register (APSR)
Interrupt Program Status Register (IPSR)
Execution Program Status Register (EPSR).
Required
privilege
Privileged
Privileged
Privileged
Privileged
Privileged
All information provided in this document is subject to legal disclaimers.
[2]
Rev. 2 — 19 August 2010
Reset
value
0x01000000
0x00000000
0x00000000
0x00000000
0x00000000
Chapter 34: Appendix: Cortex-M3 user guide
Description
Table 630
Table 631
Table 632
Table 633
Table 634
UM10360
© NXP B.V. 2010. All rights reserved.
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