LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 235

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 220. USB Command Code register (USBCmdCode - address 0x5000 C210) bit description
Table 221. USB Command Data register (USBCmdData - address 0x5000 C214) bit description
Table 222. USB DMA Request Status register (USBDMARSt - address 0x5000 C250) bit allocation
Reset value: 0x0000 0000
UM10360
User manual
Bit
7:0
15:8
23:16 CMD_CODE/
31:24 -
Bit
7:0
31:8
Bit
Symbol
Symbol
-
CMD_PHASE
CMD_WDATA
Symbol
CMD_RDATA
-
11.10.6.1 USB Command Code register (USBCmdCode - 0x5000 C210)
11.10.6.2 USB Command Data register (USBCmdData - 0x5000 C214)
11.10.7.1 USB DMA Request Status register (USBDMARSt - 0x5000 C250)
11.10.7 DMA registers
EP31
31
This register is used for sending the command and write data to the SIE. The commands
written here are propagated to the SIE and executed there. After executing the command,
the register is empty, and the CCEMPTY bit of USBDevIntSt register is set. See
Section 11.12
This register contains the data retrieved after executing a SIE command. When the data is
ready to be read, the CD_FULL bit of the USBDevIntSt register is set. See
details. USBCmdData is a read-only register.
The registers in this group are used for the DMA mode of operation (see
“DMA
A bit in this register associated with a non-isochronous endpoint is set by hardware when
an endpoint interrupt occurs (see the description of USBEpIntSt) and the corresponding
bit in USBEpIntEn is 0. A bit associated with an isochronous endpoint is set when the
corresponding bit in USBEpIntEn is 0 and a FRAME interrupt occurs. A set bit serves as a
flag for the DMA engine to start the data transfer if the DMA is enabled for the
corresponding endpoint in the USBEpDMASt register. The DMA cannot be enabled for
control endpoints (EP0 and EP1). USBDMARSt is a read-only register.
Value
-
0x01
0x02
0x05
-
Description
Command Read Data.
Reserved, user software should not write ones to reserved bits. The value read from
a reserved bit is not defined.
EP30
operation”)
30
Description
Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
The command phase:
Write
Read
Command
This is a multi-purpose field. When CMD_PHASE is Command or Read,
this field contains the code for the command (CMD_CODE). When
CMD_PHASE is Write, this field contains the command write data
(CMD_WDATA).
Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
for details. USBCmdCode is a write-only register.
All information provided in this document is subject to legal disclaimers.
EP29
29
Rev. 2 — 19 August 2010
EP28
28
Chapter 11: LPC17xx USB device controller
EP27
27
EP26
26
EP25
25
UM10360
© NXP B.V. 2010. All rights reserved.
Section 11.15
Table 192
Reset value
NA
0x00
0x00
NA
Reset value
0x00
NA
EP24
235 of 840
24
for