LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 231

IC ARM CORTEX MCU 512K 100-LQFP

LPC1767FBD100,551

Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1767FBD100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4967
935289808551

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1767FBD100,551
Quantity:
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Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 211. USB Realize Endpoint register (USBReEp - address 0x5000 C244) bit allocation
Reset value: 0x0000 0003
Table 212. USB Realize Endpoint register (USBReEp - address 0x5000 C244) bit description
UM10360
User manual
Bit
0
1
31:2
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Symbol
EP0
EP1
EPxx
EP31
EP23
EP15
EP7
31
23
15
7
Value
0
1
0
1
0
1
On reset, only the control endpoints are realized. Other endpoints, if required, are realized
by programming the corresponding bits in USBReEp. To calculate the required EP_RAM
space for the realized endpoints, see
Realization of endpoints is a multi-cycle operation. Pseudo code for endpoint realization is
shown below.
Clear EP_RLZED bit in USBDevIntSt;
for every endpoint to be realized,
{
}
Description
Control endpoint EP0 is not realized.
Control endpoint EP0 is realized.
Control endpoint EP1 is not realized.
Control endpoint EP1 is realized.
Endpoint EPxx is not realized.
Endpoint EPxx is realized.
/* OR with the existing value of the Realize Endpoint register */
USBReEp |= (UInt32) ((0x1 << endpt));
/* Load Endpoint index Reg with physical endpoint no.*/
USBEpIn = (UInt32) endpointnumber;
/* load the max packet size Register */
USBEpMaxPSize = MPS;
/* check whether the EP_RLZED bit in the Device Interrupt Status register is set
*/
while (!(USBDevIntSt & EP_RLZED))
{
}
/* Clear the EP_RLZED bit */
Clear EP_RLZED bit in USBDevIntSt;
EP30
EP22
EP14
EP6
30
22
14
6
/* wait until endpoint realization is complete */
All information provided in this document is subject to legal disclaimers.
EP29
EP21
EP13
EP5
29
21
13
5
Rev. 2 — 19 August 2010
EP28
EP20
EP12
EP4
28
20
12
4
Section
Chapter 11: LPC17xx USB device controller
EP27
EP19
EP11
EP3
27
19
11
3
11.10.4.1.
EP26
EP18
EP10
EP2
26
18
10
2
EP25
EP17
EP9
EP1
25
17
UM10360
9
1
© NXP B.V. 2010. All rights reserved.
Reset value
1
1
0
EP24
EP16
231 of 840
EP8
EP0
24
16
8
0

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