LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 275

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
13.7 Pin configuration
Table 255. USB OTG port pins
UM10360
User manual
Pin name
USB_D+
USB_D −
USB_UP_LED
USB_SCL
USB_SDA
Fig 35. USB OTG port configuration
LPC17xx
13.7.1 Connecting the USB port to an external OTG transceiver
Direction
I/O
I/O
O
I/O
I/O
The OTG controller has one USB port.
The following figures show different ways to realize connections to an USB device. The
example described here uses an ISP1302 (ST-Ericsson) for the external OTG transceiver
and the USB Host power switch LM3526-L (National Semiconductors).
For OTG functionality an external OTG transceiver must be connected to the LPC17xx:
Use the internal USB transceiver for USB signalling and use the external OTG transceiver
for OTG functionality only (see
VP/VM mode.
RSTOUT
USB_SCL
USB_SDA
EINTn
USB_D+
USB_D−
USB_UP_LED
Description
Positive differential data
Negative differential data
GoodLink LED control signal
I
I
2
2
C serial clock
C serial data
V
DD
All information provided in this document is subject to legal disclaimers.
V
DD
Rev. 2 — 19 August 2010
V
DD
OE_N/INT_N
Figure
SUSPEND
ADR/PSW
RESET_N
SPEED
INT_N
SDA
SCL
35). This option uses the internal transceiver in
ISP1302
VBUS
ID
DP
DM
Chapter 13: LPC17xx USB OTG
Control
Pin category
USB Connector
USB Connector
External OTG transceiver
External OTG transceiver
V
SSCORE
V
SSIO,
33 Ω
33 Ω
UM10360
© NXP B.V. 2010. All rights reserved.
Mini-AB
connector
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