LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 229

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 207. USB Endpoint Interrupt Set register (USBEpIntSet - address 0x5000 C23C) bit allocation
Reset value: 0x0000 0000
Table 208. USB Endpoint Interrupt Set register (USBEpIntSet - address 0x5000 C23C) bit description
Table 209. USB Endpoint Interrupt Priority register (USBEpIntPri - address 0x5000 C240) bit allocation
Reset value: 0x0000 0000
UM10360
User manual
Bit
31:0
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Symbol
See USBEpIntSet bit
allocation table above
11.10.3.4 USB Endpoint Interrupt Set register (USBEpIntSet - 0x5000 C23C)
11.10.3.5 USB Endpoint Interrupt Priority register (USBEpIntPri - 0x5000 C240)
EP15TX
EP15TX
EP11TX
EP11TX
EP7TX
EP3TX
EP7TX
EP3TX
31
23
15
31
23
15
7
7
Writing a one to a bit in this register sets the corresponding bit in USBEpIntSt. Writing zero
has no effect. Each endpoint has its own bit in this register. USBEpIntSet is a write-only
register.
This register determines whether an endpoint interrupt is routed to the EP_FAST or
EP_SLOW bits of USBDevIntSt. If a bit in this register is set to one, the interrupt is routed
to EP_FAST, if zero it is routed to EP_SLOW. Routing of multiple endpoints to EP_FAST
or EP_SLOW is possible.
Note that the USBDevIntPri register determines whether the EP_FAST interrupt is routed
to the USB_INT_REQ_HP or USB_INT_REQ_LP interrupt line.
USBEpIntPri is a write-only register.
EP15RX
EP15RX
EP11RX
EP11RX
EP7RX
EP3RX
EP7RX
EP3RX
Value Description
0
1
30
22
14
30
22
14
6
6
No effect.
Sets the corresponding bit in USBEpIntSt.
All information provided in this document is subject to legal disclaimers.
EP14TX
EP10TX
EP14TX
EP10TX
EP6TX
EP2TX
EP6TX
EP2TX
29
21
13
29
21
13
5
5
Rev. 2 — 19 August 2010
EP14RX
EP10RX
EP10RX
EP6RX
EP2RX
EP6RX
EP2RX
E14RX
28
20
12
28
20
12
4
4
EP13TX
EP13TX
EP9TX
EP9TX
EP5TX
EP1TX
EP5TX
EP1TX
Chapter 11: LPC17xx USB device controller
27
19
27
19
11
11
3
3
EP13RX
EP13RX
EP9RX
EP5RX
EP1RX
EP9RX
EP5RX
EP1RX
26
18
10
26
18
10
2
2
EP12TX
EP12TX
EP8TX
EP4TX
EP0TX
EP8TX
EP4TX
EP0TX
25
17
25
17
UM10360
9
1
9
1
© NXP B.V. 2010. All rights reserved.
Reset value
0
EP12RX
EP12RX
EP8RX
EP4RX
EP0RX
EP8RX
EP4RX
EP0RX
229 of 840
24
16
24
16
8
0
8
0