LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 575

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
29.4 Pin description
Table 529. ADC pin description
UM10360
User manual
Pin
AD0.7 to AD0.0
V
V
REFP
DDA
, V
, V
SSA
REFN
Type
Input
Reference
Power
Table 529
gives a brief summary of each of ADC related pins.
Description
Analog Inputs. The ADC cell can measure the voltage on any of these input signals.
Digital signals are disconnected from the ADC input pins when the ADC function is
selected on that pin in the Pin Select register.
Warning: if the ADC is used, signal levels on analog input pins must not be above the
level of V
converter is not used in an application then the pins associated with A/D inputs can be
used as 5 V tolerant digital IO pins.
Voltage References. These pins provide a voltage reference level for the ADC and
DAC. Note: V
the ADC and DAC are not used.
Analog Power and Ground. These should typically be the same voltages as V
V
to VDD(3V3) and VSSA should be tied to VSS if the ADC and DAC are not used.
SS
, but should be isolated to minimize noise and error. Note: VDDA should be tied
All information provided in this document is subject to legal disclaimers.
DDA
Rev. 2 — 19 August 2010
at any time. Otherwise, A/D converter readings will be invalid. If the A/D
REFP
should be tied to VDD(3V3) and V
Chapter 29: LPC17xx Analog-to-Digital Converter (ADC)
REFN
should be tied to V
UM10360
© NXP B.V. 2010. All rights reserved.
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DD
SS
and
if