LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 364
![IC ARM CORTEX MCU 512K 100-LQFP](/photos/6/65/66516/568-100-lqfp_sot407-1_sml.jpg)
LPC1767FBD100,551
Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.LPC1767FBD100551.pdf
(2 pages)
2.LPC1767FBD100551.pdf
(840 pages)
3.LPC1767FBD100551.pdf
(65 pages)
Specifications of LPC1767FBD100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4967
935289808551
935289808551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
- Current page: 364 of 840
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NXP Semiconductors
Table 324. CAN Status Register (CAN1SR - address 0x4004 401C, CAN2SR - address 0x4004 801C) bit description
[1]
[2]
UM10360
User manual
Bit
10
11
12
13
14
15
16
17
18
19
20
21
22
23
31:24 -
If the CPU tries to write to this Transmit Buffer when the Transmit Buffer Status bit is '0' (locked), the written byte is not accepted and is
lost without this being signalled.
The Transmission Complete Status bit is set '0' (incomplete) whenever the Transmission Request bit or the Self Reception Request bit
is set '1' for this TX buffer. The Transmission Complete Status bit remains '0' until a message is transmitted successfully.
Symbol Value
TBS2
TCS2
RS
TS2
ES
BS
RBS
DOS
TBS3
TCS3
RS
TS3
ES
BS
[1]
[1]
[2]
[2]
0(locked)
1(released)
0(incomplete) The previously requested transmission for Tx Buffer 2 is not complete.
1(complete)
0(idle)
1(transmit)
0(locked)
1(released)
0(incomplete) The previously requested transmission for Tx Buffer 3 is not complete.
1(complete)
0(idle)
1(transmit)
Function
Transmit Buffer Status 2.
Software cannot access the Tx Buffer 2 nor write to the corresponding
CANxTFI, CANxTID, CANxTDA, and CANxTDB registers because a
message is either waiting for transmission or is in transmitting process.
Software may write a message into the Transmit Buffer 2 and its CANxTFI,
CANxTID, CANxTDA, and CANxTDB registers.
Transmission Complete Status.
The previously requested transmission for Tx Buffer 2 has been successfully
completed.
Receive Status. This bit is identical to the RS bit in the GSR.
Transmit Status 2.
There is no transmission from Tx Buffer 2.
The CAN Controller is transmitting a message from Tx Buffer 2.
Error Status. This bit is identical to the ES bit in the CANxGSR.
Bus Status. This bit is identical to the BS bit in the CANxGSR.
Receive Buffer Status. This bit is identical to the RBS bit in the CANxGSR.
Data Overrun Status. This bit is identical to the DOS bit in the CANxGSR.
Transmit Buffer Status 3.
Software cannot access the Tx Buffer 3 nor write to the corresponding
CANxTFI, CANxTID, CANxTDA, and CANxTDB registers because a
message is either waiting for transmission or is in transmitting process.
Software may write a message into the Transmit Buffer 3 and its CANxTFI,
CANxTID, CANxTDA, and CANxTDB registers.
Transmission Complete Status.
The previously requested transmission for Tx Buffer 3 has been successfully
completed.
Receive Status. This bit is identical to the RS bit in the GSR.
Transmit Status 3.
There is no transmission from Tx Buffer 3.
The CAN Controller is transmitting a message from Tx Buffer 3.
Error Status. This bit is identical to the ES bit in the CANxGSR.
Bus Status. This bit is identical to the BS bit in the CANxGSR.
Reserved, the value read from a reserved bit is not defined.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 16: LPC17xx CAN1/2
UM10360
© NXP B.V. 2010. All rights reserved.
0
Reset
Value
1
1
1
1
0
0
0
1
1
1
1
0
0
NA
364 of 840
RM
Set
1
x
0
0
0
0
0
0
1
x
0
0
0
0
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