LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 108

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
UM10360
User manual
8.5.1 Pin Function Select register 0 (PINSEL0 - 0x4002 C000)
8.5.2 Pin Function Select Register 1 (PINSEL1 - 0x4002 C004)
The PINSEL0 register controls the functions of the lower half of Port 0. The direction
control bit in FIO0DIR register is effective only when the GPIO function is selected for a
pin. For other functions, the direction is controlled automatically.
Table 79.
[1]
The PINSEL1 register controls the functions of the upper half of Port 0. The direction
control bit in the FIO0DIR register is effective only when the GPIO function is selected for
a pin. For other functions the direction is controlled automatically.
Table 80.
PINSEL0 Pin
1:0
3:2
5:4
7:6
9:8
11:10
13:12
15:14
17:16
19:18
21:20
23:22
29:24
31:30
PINSEL1 Pin name Function when
1:0
3:2
5:4
7:6
9:8
11:10
13:12
15:14
17:16
19:18
21:20
23:22
25:24
Not available on 80-pin package.
name
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P0.8
P0.9
P0.10
P0.11
-
P0.15
P0.16
P0.17
P0.18
P0.19
P0.20
P0.21
P0.22
P0.23
P0.24
P0.25
P0.26
P0.27
P0.28
Pin function select register 0 (PINSEL0 - address 0x4002 C000) bit description
Pin function select register 1 (PINSEL1 - address 0x4002 C004) bit description
[1]
[1]
All information provided in this document is subject to legal disclaimers.
[1]
[1]
[1]
[1]
[1]
[1][2]
[1][2]
Function when
00
GPIO Port 0.0
GPIO Port 0.1
GPIO Port 0.2
GPIO Port 0.3
GPIO Port 0.4
GPIO Port 0.5
GPIO Port 0.6
GPIO Port 0.7
GPIO Port 0.8
GPIO Port 0.9
GPIO Port 0.10 TXD2
GPIO Port 0.11
Reserved
GPIO Port 0.15 TXD1
00
GPIO Port 0.16 RXD1
GPIO Port 0.17 CTS1
GPIO Port 0.18 DCD1
GPIO Port 0.19 DSR1
GPIO Port 0.20 DTR1
GPIO Port 0.21 RI1
GPIO Port 0.22 RTS1
GPIO Port 0.23 AD0.0
GPIO Port 0.24 AD0.1
GPIO Port 0.25 AD0.2
GPIO Port 0.26 AD0.3
GPIO Port 0.27 SDA0
GPIO Port 0.28 SCL0
Rev. 2 — 19 August 2010
Function when 01
RD1
TD1
TXD0
RXD0
I2SRX_CLK
I2SRX_WS
I2SRX_SDA
I2STX_CLK
I2STX_WS
I2STX_SDA
RXD2
Reserved
Function
when 01
Chapter 8: LPC17xx Pin connect block
Function
when 10
SSEL0
MISO0
MOSI0
Reserved
Reserved
Reserved
Reserved
I2SRX_CLK
I2SRX_WS
I2SRX_SDA
AOUT
USB_SDA
USB_SCL
Function
when 10
TXD3
RXD3
AD0.7
AD0.6
RD2
TD2
SSEL1
SCK1
MISO1
MOSI1
SDA2
SCL2
Reserved
SCK0
Function
when 11
SSEL
MISO
MOSI
SDA1
SCL1
RD1
TD1
CAP3.0
CAP3.1
TXD3
RXD3
Reserved
Reserved
Function
when 11
SDA1
SCL1
Reserved
Reserved
CAP2.0
CAP2.1
MAT2.0
MAT2.1
MAT2.2
MAT2.3
MAT3.0
MAT3.1
Reserved
SCK
UM10360
© NXP B.V. 2010. All rights reserved.
Reset
value
00
00
00
00
00
00
00
00
00
00
00
00
00
108 of 840
Reset
value
00
00
00
00
00
00
00
00
00
00
00
00
0
00