LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 311

IC ARM CORTEX MCU 512K 100-LQFP

LPC1767FBD100,551

Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1767FBD100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4967
935289808551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1767FBD100,551
Quantity:
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Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
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NXP Semiconductors
Table 283: UARTn IrDA Control Register (U0ICR - 0x4000 C024, U2ICR - 0x4009 8024, U3ICR - 0x4009 C024) bit
UM10360
User manual
Bit
0
1
Fig 45. Auto-baud a) mode 0 and b) mode 1 waveform
a. Mode 0 (start bit and LSB are used for auto-baud)
b. Mode 1 (only start bit is used for auto-baud)
16xbaud_rate
16xbaud_rate
Symbol
IrDAEn
IrDAInv
UnACR start
UnACR start
rate counter
rate counter
UARTn RX
UARTn RX
description
14.4.11 UARTn IrDA Control Register (U0ICR - 0x4000 C024, U2ICR - 0x4009
Value Description
0
1
8024, U3ICR - 0x4009 C024)
The IrDA Control Register enables and configures the IrDA mode on each UART. The
value of UnICR should not be changed while transmitting or receiving data, or data loss or
corruption may occur.
IrDA mode on UARTn is disabled, UARTn acts as a standard UART.
IrDA mode on UARTn is enabled.
When 1, the serial input is inverted. This has no effect on the serial output.
When 0, the serial input is not inverted.
start
start
16 cycles
16 cycles
bit0
bit0
All information provided in this document is subject to legal disclaimers.
bit1
bit1
start bit
start bit
Rev. 2 — 19 August 2010
bit2
bit2
'A' (0x41) or 'a' (0x61)
'A' (0x41) or 'a' (0x61)
bit3
bit3
bit4
bit4
16 cycles
bit5
bit5
bit6
bit6
LSB of 'A' or 'a'
LSB of 'A' or 'a'
Chapter 14: LPC17xx UART0/2/3
bit7
bit7
parity stop
parity stop
UM10360
© NXP B.V. 2010. All rights reserved.
0
Reset value
0
311 of 840

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