LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 177

IC ARM CORTEX MCU 512K 100-LQFP

LPC1767FBD100,551

Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1767FBD100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4967
935289808551

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Part Number:
LPC1767FBD100,551
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LPC1767FBD100,551
Manufacturer:
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NXP Semiconductors
10.16 Ethernet block functional description
UM10360
User manual
10.16.1 Overview
The transmit status consists of one word which is the StatusInfo word. It contains flags
returned by the MAC and flags generated by the transmit data path reflecting the status of
the transmission.
Table 183. Transmit status information word
For multi-fragment frames, the value of the LateCollision, ExcessiveCollision,
ExcessiveDefer, Defer and CollissionCount bits in all but the last fragment in the frame will
be 0. The status of the last fragment in the frame will copy the value for these bits from the
MAC. All fragment statuses will have valid Error, NoDescriptor and Underrun bits.
This section defines the functions of the DMA capable 10/100 Ethernet MAC. After
introducing the DMA concepts of the Ethernet block, and a description of the basic
transmit and receive functions, this section elaborates on advanced features such as flow
control, receive filtering, etc.
The Ethernet block can transmit and receive Ethernet packets from an off-chip Ethernet
PHY connected through the RMII interface.
Typically during system start-up, the Ethernet block will be initialized. Software
initialization of the Ethernet block should include initialization of the descriptor and status
arrays as well as the receiver fragment buffers.
Remark: when initializing the Ethernet block, it is important to first configure the PHY and
insure that reference clocks (ENET_REF_CLK signal in RMII mode, or both
ENET_RX_CLK and ENET_TX_CLK signals in MII mode) are present at the external pins
and connected to the EMAC module (selecting the appropriate pins using the PINSEL
registers) prior to continuing with Ethernet configuration. Otherwise the CPU can become
locked and no further functionality will be possible. This will cause JTAG lose
communication with the target, if debug mode is being used.
Bit
20:0
24:21 CollisionCount
25
26
27
28
29
30
31
Symbol
-
Defer
ExcessiveDefer
ExcessiveCollision Indicates this packet exceeded the maximum collision limit and was
LateCollision
Underrun
NoDescriptor
Error
All information provided in this document is subject to legal disclaimers.
Table 183
Rev. 2 — 19 August 2010
Description
Unused
The number of collisions this packet incurred, up to the
Retransmission Maximum.
This packet incurred deferral, because the medium was occupied.
This is not an error unless excessive deferral occurs.
This packet incurred deferral beyond the maximum deferral limit and
was aborted.
aborted.
An Out of window Collision was seen, causing packet abort.
A Tx underrun occurred due to the adapter not producing transmit
data.
The transmit stream was interrupted because a descriptor was not
available.
An error occurred during transmission. This is a logical OR of
Underrun, LateCollision, ExcessiveCollision, and ExcessiveDefer.
lists the bit definitions in the StatusInfo word.
Chapter 10: LPC17xx Ethernet
UM10360
© NXP B.V. 2010. All rights reserved.
177 of 840

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