LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 598

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 554. DMA Software Single Request register (DMACSoftSReq - 0x5000 4024)
Table 555. DMA Software Last Burst Request register (DMACSoftLBReq - 0x5000 4028)
UM10360
User manual
Bit
15:0
31:16
Bit
15:0
31:16
Name
SoftSReq
-
Name
SoftLBReq
-
31.5.10 DMA Software Single Request register (DMACSoftSReq - 0x5000
31.5.12 DMA Software Last Single Request register (DMACSoftLSReq -
31.5.11 DMA Software Last Burst Request register (DMACSoftLBReq - 0x5000
4024)
The DMACSoftSReq Register is read/write and enables DMA single transfer requests to
be generated by software. A DMA request can be generated for each source by writing a
1 to the corresponding register bit. A register bit is cleared when the transaction has
completed. Reading the register indicates which sources are requesting single DMA
transfers. A request can be generated from either a peripheral or the software request
register.
4028)
The DMACSoftLBReq Register is read/write and enables DMA last burst requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
completed. Reading the register indicates which sources are requesting last burst DMA
transfers. A request can be generated from either a peripheral or the software request
register.
0x5000 402C)
The DMACSoftLSReq Register is read/write and enables DMA last single requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
completed. Reading the register indicates which sources are requesting last single DMA
transfers. A request can be generated from either a peripheral or the software request
register.
Table 554
Table 555
Table 556
Function
Software single transfer request flags for each of 16 possible sources. Each bit
represents one DMA request line or peripheral function:
0 - writing 0 has no effect.
1 - writing 1 generates a DMA single transfer request for the corresponding request
line.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Function
Software last burst request flags for each of 16 possible sources. Each bit represents
one DMA request line or peripheral function:
0 - writing 0 has no effect.
1 - writing 1 generates a DMA last burst request for the corresponding request line.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
All information provided in this document is subject to legal disclaimers.
shows the bit assignments of the DMACSoftSReq Register.
shows the bit assignments of the DMACSoftLBReq Register.
shows the bit assignments of the DMACSoftLSReq Register.
Rev. 2 — 19 August 2010
Chapter 31: LPC17xx General Purpose DMA (GPDMA)
UM10360
© NXP B.V. 2010. All rights reserved.
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